TFT_FastPin.h File Reference

#include <avr/io.h>
#include <Arduino.h>

Go to the source code of this file.

Classes
class	CMinWait< FASTPIN_WAIT >
class	Selectable
class	Pin
class	OutputPin
class	InputPin
class	FastPin< PIN >
	The simplest level of Pin class. This relies on runtime functions durinig initialization to get the port/pin mask for the pin. Most of the accesses involve references to these static globals that get set up. This won't be the fastest set of pin operations, but it will provide pin level access on pretty much all arduino environments. In addition, it includes some methods to help optimize access in various ways. Namely, the versions of hi, lo, and fastset that take the port register as a passed in register variable (saving a global dereference), since these functions are aggressively inlined, that can help collapse out a lot of extraneous memory loads/dereferences. More...
class	_AVRPIN< PIN, _MASK, _PORT, _DDR, _PIN >
	Class definition for a Pin where we know the port registers at compile time for said pin. This allows us to make a lot of optimizations, as the inlined hi/lo methods will devolve to a single io register write/bitset. More...
class	_ARMPIN< PIN, _MASK, _PDOR, _PSOR, _PCOR, _PTOR, _PDIR, _PDDR >
	Template definition for teensy 3.0 style ARM pins, providing direct access to the various GPIO registers. Note that this uses the full port GPIO registers. In theory, in some way, bit-band register access -should- be faster, however I have found that something about the way gcc does register allocation results in the bit-band code being slower. It will need more fine tuning. More...
class	_ARMPIN_BITBAND< PIN, _BIT, _PDOR, _PSOR, _PCOR, _PTOR, _PDIR, _PDDR >
	Template definition for teensy 3.0 style ARM pins using bit banding, providing direct access to the various GPIO registers. GCC does a poor job of optimizing around these accesses so they are not being used just yet. More...

Macros
#define	NO_PIN   255
#define	_CYCLES(_PIN)   ((_PIN >= 24) ? 2 : 1)
#define	_R(T)   struct __gen_struct_ ## T
#define	_RD8(T)   struct __gen_struct_ ## T { static inline reg8_t r() { return T; }};
#define	_IO(L)   _RD8(DDR ## L); _RD8(PORT ## L); _RD8(PIN ## L);
#define	_DEFPIN_AVR(PIN, MASK, L)   template<> class FastPin<PIN> : public _AVRPIN<PIN, MASK, _R(PORT ## L), _R(DDR ## L), _R(PIN ## L)> {};
#define	GPIO_BITBAND_ADDR(reg, bit)   (((uint32_t)&(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000)
#define	GPIO_BITBAND_PTR(reg, bit)   ((uint32_t *)GPIO_BITBAND_ADDR((reg), (bit)))
#define	_RD32(T)
#define	_IO32(L)   _RD32(GPIO ## L ## _PDOR); _RD32(GPIO ## L ## _PSOR); _RD32(GPIO ## L ## _PCOR); _RD32(GPIO ## L ## _PTOR); _RD32(GPIO ## L ## _PDIR); _RD32(GPIO ## L ## _PDDR);
#define	_DEFPIN_ARM(PIN, BIT, L)
#define	NO_HARDWARE_PIN_SUPPORT

Typedefs
typedef volatile uint8_t &	reg8_t
	AVR definitions for pins. Getting around the fact that I can't pass GPIO register addresses in as template arguments by instead creating a custom type for each GPIO register with a single, static, aggressively inlined function that returns that specific GPIO register. A similar trick is used a bit further below for the ARM GPIO registers (of which there are far more than on AVR!) More...
typedef volatile uint32_t &	reg32_t
typedef volatile uint32_t *	ptr_reg32_t

Macro Definition Documentation

#define _CYCLES

(

_PIN

)

((_PIN >= 24) ? 2 : 1)

Definition at line 66 of file TFT_FastPin.h.

#define _DEFPIN_ARM	(		PIN,
			BIT,
			L
	)

Value:

template<> class FastPin<PIN> : public _ARMPIN<PIN, 1 << BIT, _R(GPIO ## L ## _PDOR), _R(GPIO ## L ## _PSOR), _R(GPIO ## L ## _PCOR), \
                                                                            _R(GPIO ## L ## _PTOR), _R(GPIO ## L ## _PDIR), _R(GPIO ## L ## _PDDR)> {};

Definition at line 276 of file TFT_FastPin.h.

#define _DEFPIN_AVR	(		PIN,
			MASK,
			L
	)		template<> class FastPin<PIN> : public _AVRPIN<PIN, MASK, _R(PORT ## L), _R(DDR ## L), _R(PIN ## L)> {};

Definition at line 263 of file TFT_FastPin.h.

#define _IO

(

L

)

_RD8(DDR ## L); _RD8(PORT ## L); _RD8(PIN ## L);

Definition at line 262 of file TFT_FastPin.h.

#define _IO32

(

L

)

_RD32(GPIO ## L ## _PDOR); _RD32(GPIO ## L ## _PSOR); _RD32(GPIO ## L ## _PCOR); _RD32(GPIO ## L ## _PTOR); _RD32(GPIO ## L ## _PDIR); _RD32(GPIO ## L ## _PDDR);

Definition at line 274 of file TFT_FastPin.h.

#define _R

(

T

)

struct __gen_struct_ ## T

Definition at line 260 of file TFT_FastPin.h.

#define _RD32

(

T

)

Value:

struct __gen_struct_ ## T { static __attribute__((always_inline)) inline reg32_t r() { return T; } \
    template<int BIT> static __attribute__((always_inline)) inline ptr_reg32_t rx() { return GPIO_BITBAND_PTR(T, BIT); } };

Definition at line 272 of file TFT_FastPin.h.

#define _RD8

(

T

)

struct __gen_struct_ ## T { static inline reg8_t r() { return T; }};

Definition at line 261 of file TFT_FastPin.h.

#define GPIO_BITBAND_ADDR	(		reg,
			bit
	)		(((uint32_t)&(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000)

Definition at line 266 of file TFT_FastPin.h.

#define GPIO_BITBAND_PTR	(		reg,
			bit
	)		((uint32_t *)GPIO_BITBAND_ADDR((reg), (bit)))

Definition at line 267 of file TFT_FastPin.h.

#define NO_HARDWARE_PIN_SUPPORT

Definition at line 480 of file TFT_FastPin.h.

#define NO_PIN   255

Definition at line 38 of file TFT_FastPin.h.

Typedef Documentation

typedef volatile uint32_t* ptr_reg32_t

Definition at line 270 of file TFT_FastPin.h.

typedef volatile uint32_t& reg32_t

Definition at line 269 of file TFT_FastPin.h.

typedef volatile uint8_t& reg8_t

AVR definitions for pins. Getting around the fact that I can't pass GPIO register addresses in as template arguments by instead creating a custom type for each GPIO register with a single, static, aggressively inlined function that returns that specific GPIO register. A similar trick is used a bit further below for the ARM GPIO registers (of which there are far more than on AVR!)

Definition at line 259 of file TFT_FastPin.h.